Zeal 8-bit Computer
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Emulator
FAQ
About
Foreword
1.
Overview
2.
Specifications
3.
Memory mapping
▸
3.1
Overview
3.2
Physical memory mapping
3.3
I/O mapping
4.
Power-on and reset circuit
▸
4.1
Overview
4.2
Powering on
4.3
Reset signal
4.4
Reset switch
4.5
Reset circuit diagram
5.
Clock circuit
▸
5.1
Overview
5.2
Hardware description
5.3
Underclocking and overclocking
6.
Zilog Z80 Processor
▸
6.1
Overview
6.2
Hardware implementation
6.3
CPU speed and clock signal
6.4
Boot up
6.5
Memory requests
6.6
I/O requests
6.7
Interrupts
7.
Memory Management Unit (MMU)
▸
7.1
Overview
7.2
Hardware description
7.3
Virtual memory segmentation
7.4
Disabling the MMU
7.5
MMU examples
8.
Logic Glue
▸
8.1
Overview
8.2
Hardware description
8.3
Hardware implementation
8.4
Hardware dependencies and timing
8.5
Maintenance
9.
Read-only Memory (ROM)
▸
9.1
Overview
9.2
Hardware implementation
9.3
Hardware dependencies and timing
9.4
Installing a bigger NOR Flash
9.5
Disabling the ROM
9.6
Programming the ROM
10.
Random-Access Memory (RAM)
▸
10.1
Overview
10.2
Hardware implementation
10.3
Hardware dependencies and timing
11.
Parallel I/O: Zilog Z80 PIO
▸
11.1
Overview
11.2
Hardware implementation
11.3
Ports A and B
11.4
User port
11.5
System port
11.6
Programming the PIO
12.
Universal Asynchronous Receiver Transmitter (UART)
▸
12.1
Overview
12.2
Hardware implementation
12.3
Protocol description
12.4
Limitation
13.
Inter-Integrated Circuit (I²C)
▸
13.1
Overview
13.2
Hardware implementation
13.3
Protocol description
13.4
Limitation
13.5
Internal I²C connector
14.
I²C EEPROM
▸
14.1
Overview
14.2
Hardware implementation
14.3
Communicating with the EEPROM
14.4
Extending with more EEPROM
15.
I²C Real-time Clock (RTC)
▸
15.1
Overview
15.2
Hardware implementation
15.3
Communicating with the RTC
15.4
Bonus features
16.
PS/2 Keyboard
▸
16.1
Overview
16.2
PS/2 protocol
16.3
Hardware implementation
16.4
Timings
16.5
Limitations
17.
User port
18.
Extension port
19.
Video card connector
▸
19.1
Overview
19.2
Hardware implementation
19.3
H-Blank and V-Blank signals
19.4
Video board memory mapping
19.5
DMA capabilities
Revision history
Revision history
2023-07-26:
Documentation is now public